I²C Interface Bank

This bank allows I²C Masters to query and manipulate the I²C properties of the device.

RAM Write Protect Flag

The Write Protect Flag for the I²C RAM Bank resides at address 0x010.

0x010
0000000 w

The w flag is 1 if the RAM is write-protected (read-only), or 0 if it is writable. This register is both readable and writiable by any Master on the bus.

Note that the Protected RAM Address Mask (below) takes precedence over this flag and can only be modified by the Protected RAM Address Mask (Slave) command given over the USB interface.

RAM Protected Address Mask

The Protected Address Mask for the I²C RAM Bank resides at addresses [0x011, 0x012] as a 16-bit Little Endian word.

0x011 (LSB)	0x012 (MSB)
mmmmmmmm	z 00000 mm

This register is readable by any Master on the bus. Writing to the address mask can only be done by issuing a Protected RAM Address Mask (Slave) command over the USB interface. See that command for an explanation of the function and the meanings of the bits.

ROM Write Protect Flag

The Write Protect Flag for the I²C ROM Bank resides at address 0x020.

0x020
0000000 w

The w flag is 1 if the ROM is write-protected (read-only), or 0 if it is writable. This register is both readable and writiable by any Master on the bus.

Note that the Protected ROM Address Mask (below) takes precedence over this flag and can only be modified by the Protected ROM Address Mask (Slave) command given over the USB interface.

ROM Protected Address Mask

The Protected Address Mask for the I²C ROM Bank resides at addresses [0x021, 0x022] as a 16-bit Little Endian word.

0x021 (LSB)	0x022 (MSB)
mmmmmmmm	z 00000 mm

This register is readable by any Master on the bus. Writing to the address mask can only be done by issuing a Protected ROM Address Mask (Slave) command over the USB interface. See that command for an explanation of the function and the meanings of the bits.